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C/C++ Source or Header  |  1993-11-27  |  3.0 KB  |  130 lines
  1. /*
  2.     Register.CPP version 1.0
  3.     by Robert Schmidt of Ztiff Zox Softwear 1993
  4.  
  5.     Defines the member functions of the Register class declared in
  6.         Register.hpp.
  7.     Defines the stream operators >> and << to read and write register
  8.         info from istreams/to ostreams in *binary* format.
  9. */
  10.  
  11. #include <dos.h>
  12. #include <iostream.h>
  13. #include "Register.hpp"
  14.  
  15.  
  16. /*
  17.     Register::out()
  18.         Outputs the Register.value to the correct port/index.
  19.         It takes care of handling recognized special cases, like some
  20.         VGA ports, correctly.
  21. */
  22.  
  23. void Register::out()
  24.     {
  25.     switch (port)
  26.         {
  27.         // First handle special cases:
  28.  
  29.         case ATTRCON_ADDR:
  30.             inportb(STATUS_ADDR);          // reset read/write flip-flop
  31.             outportb(ATTRCON_ADDR, index);
  32.             outportb(ATTRCON_ADDR, value);
  33.             break;
  34.  
  35.         case SEQ_ADDR:
  36.             if (index == 1)
  37.                 {
  38.                 // Reset the sequencer if the clock polarity settings
  39.                 //  are being accessed.
  40.                 outport(SEQ_ADDR, 0x0100);
  41.                 outport(SEQ_ADDR, value<<8 | 1);
  42.                 outport(SEQ_ADDR, 0x0300);
  43.                 break;
  44.                 }
  45.         case GRACON_ADDR:
  46.         case CRTC_ADDR:
  47.         case CHIPSTECH:
  48.             outport(port, index | value<<8);
  49.             break;
  50.  
  51.         case MISC_ADDR:
  52.         case VGAENABLE_ADDR:
  53.         default:                        // Default is to write the byte
  54.             outportb(port, value);        //    directly to the port
  55.             break;
  56.         }
  57.     }
  58.  
  59. /*
  60.     Register::in()
  61.         Inputs Register.value to the associated hardware register.
  62.         It takes care of handling recognized special cases,
  63.         like some VGA ports, correctly.
  64. */
  65.  
  66. unsigned char Register::in()
  67.     {
  68.     switch (port)
  69.         {
  70.         // First handle special cases:
  71.  
  72.         case MISC_ADDR:
  73.             value = inportb(0x3cc);        // 0x3c2 is write-only, reading
  74.                                         // must be mapped to 0x3cc
  75.             break;
  76.  
  77.         case ATTRCON_ADDR:                // This 1 is odd.  First do a read to
  78.             inportb(STATUS_ADDR);        //    reset the index/data flip-flop.
  79.                                         //    Then give it the index, but:
  80.                                         //    set bit 5!  If cleared, VGA
  81.                                         //    output is disabled!
  82.             outportb(ATTRCON_ADDR, index);
  83.             value = inportb(ATTRCON_ADDR+1);
  84.             break;
  85.  
  86.         case SEQ_ADDR:                    // These 3 are similar.  Give it the
  87.         case GRACON_ADDR:                //    register index, then read the
  88.         case CRTC_ADDR:                    //    byte from port+1.
  89.         case CHIPSTECH:
  90.             outportb(port, index);
  91.             value = inportb(port+1);
  92.             break;
  93.  
  94.         case VGAENABLE_ADDR:
  95.         default:                        // Default is to read the byte
  96.             value = inportb(port);        //    directly from the port
  97.             break;
  98.         }
  99.  
  100.     return value;                            // Return value of first reg.
  101.     }
  102.  
  103. /*
  104.     The following stream operators operate on Registers in *binary*
  105.     format, i.e. they are not suitable for communicating with text streams
  106.     like the keyboard or the screen (cin/cout).
  107. */
  108.  
  109. istream& operator>> (istream &in, Register &r)
  110.     {
  111.     r.port = unsigned(in.get()) | (unsigned(in.get()) << 8);
  112.     r.index = in.get();
  113.     r.value = in.get();
  114.  
  115.     return in;
  116.     }
  117.  
  118. ostream& operator<< (ostream &out, Register &r)
  119.     {
  120.     out.put(char(r.port));
  121.     out.put(char(r.port>>8));
  122.     out.put(r.index);
  123.     out.put(r.value);
  124.  
  125.     return out;
  126.     }
  127.  
  128.  
  129.  
  130.